This invention relates to integrated circuit nonvolatile memories, and in particular to flash memories. Flash memories are electrically-erasable nonvolatile memories in which groups of cells can be erased in a single operation.
Numerous types of integrated circuit memory are now well known, as are processes for manufacturing them. One particular type of integrated circuit memory is nonvolatile memory. Nonvolatile memory is referred to as such because it does not lose the information stored in the memory when power is removed from the memory. Nonvolatile memory has many applications in products where the supply of electricity is interruptable. For example, one well known product employing flash memory is PCMCIA or PC cards. PC cards are small credit card-sized packages which contain nonvolatile memory within which a computer program or other information is stored. Such devices allow the user to connect and disconnect the memory card from a computer or other electronic apparatus, without losing the program stored within the memory card.
Nonvolatile memory devices include read only memories (ROM), programmable read only memories (PROM), electrically-erasable read only memories (EEPROM), as well as other types. Within the field of electrically-erasable programmable memories, a certain class of devices is known as flash memory, or flash EEPROMs. Such memories are selectively programmable and erasable, typically with groups of cells being erasable in a single operation.
In conventional flash memories, each memory cell is formed from a transistor having a source, drain, control gate and floating gate. The floating gate is formed between the control gate and the substrate. The presence, or absence, of charge trapped on the floating gate can be used to indicate the contents of the memory cell. Charge trapped on the floating gate changes the threshold voltage of the transistor, enabling detection of its binary condition. FIG. 1A and FIG. 1B illustrate typical prior art flash memory cells.
In most flash memories, charge is placed on, or removed from, the floating gate by operating the memory at conditions outside its normal operating conditions for reading its contents. For example, by adjusting the relative potentials between the gate and the source, drain or channel regions, charge, in the form of electrons, can be caused to be injected onto the floating gate, or removed from the floating gate.
An unfortunate disadvantage of existing flash memory cells is that a high potential must be applied to the control gate to program the floating gate. For example, by placing a high positive voltage such as 8.5 volts on the control gate and grounding the source region, electrons will be pulled from the source onto the floating gate where they will be trapped. The negative charge on the floating gate then can be used to indicate the presence of a "one" or a "zero" in the memory cell. An unfortunate consequence of the requirement of using such a high potential for programming (or erase) is that the peripheral circuitry must be designed to also handle that high potential. In other words, all of the transistors and the accessing circuitry through which the 8.5 volts is applied, must itself be capable of handling the 8.5 volt potential. The high potential also generates leakage currents, and causes hot hole degradation. One such typical prior art NOR flash memory cell is described in U.S. Pat. No. 5,077,691 entitled "Flash EEPROM Array with Negative Gate Voltage Erase Operation."
As a result, it would be desirable to provide a flash memory which operates at a lower potential, minimizing these undesirable effects, and which provides improved performance.